o 3/iA@sddlZddlmZmZddlmZddlmZeddGdddZ  dd ee d e d eefd d Z dd ee d eefddZ  dd ee d e d eefddZ dS)N)OptionalList)partial) dataclassT)frozenc@szeZdZUdZeed<dZeed<dZeed<dZ eed<dZ eed <d Z eed <d Z eed <dZ eed<dZeed<dS) GemmConfigtile_mtile_nTpingpongis_dynamic_persistent cluster_m cluster_nFswap_abmax_swizzle_size device_capacityN)__name__ __module__ __qualname__r int__annotations__r r boolr rrrrrrr^/lsinfo/ai/hellotax_ai/llm_service/venv_vllm/lib/python3.10/site-packages/quack/gemm_config.pyrs        repilogue tune_coopreturncCsgd}dd|Dddg}dd|Ddg}|dvr,d d|D}d d|D}n |d vr7d d|D}g}|rD|d d|D7}|dd|D7}ddg}|d vrYddg}ddg}|dvrddg}ddt|||DS)N)rr cSg|]}d|fqS)r.0r rrr z%_get_sm90_configs..)r)rr%cSr$)rrr&rrrr(!r))r r)gatedcSs,g|]\}}|ddkr|dkr||fqS) rr rr'mnrrrr(#s,cSs$g|]\}}|ddkr||fqS)r,rrr-rrrr($s$)lsecSs g|] \}}|dkr||fqS)r rr-rrrr(&s cSg|] \}}||dfqS)Frr-rrrr()cSr1)Trr-rrrr(*r2rrrrFTr0r+c Ss4g|]\\}}}\}}}t||||||dddqS)rF)r r r rrrrr )r)r'r r r rrrrrrr(3s ) itertoolsproduct)rr tile_n_valstile_mn_coop_valstile_mn_pingpong_vals tile_mn_valscluster swap_ab_valsrrr_get_sm90_configss8  r>csgd}dd|Ddd|Ddd|Ddd|Ddd|Ddd|D}d d g}|d vr9d g}ttd d d d d g}fddt|||DS)N)@rr"r r*r%cSg|]}d|dfqS)r)rrrr&rrrr(Kz&_get_sm100_configs..cSr@)rr3rr&rrrr(LrAcSr@)rr4rr&rrrr(MrAcSr@)rrrrr&rrrr(NrAcSr@)r%r4rr&rrrr(OrAcSr@)r%rBrr&rrrr(PrAFTr5 )r rc s2g|]\\}}\}}}}|||||d|dqS)r)r r rrrrr r)r'r.r/cmcnsabuse_clc GemmConfigClsrrr(Ys )rrr6r7)rr8tile_mn_cluster_valsr= use_clc_valsrrHr_get_sm100_configsFs2        rLcCst||t|S)a.Return autotuning configs for all supported device capabilities (sm90 + sm100). Each GemmConfig is tagged with its target device_capacity, so the caller can filter at runtime based on the actual device. This avoids querying the device (and initializing a CUDA context) at import time. )r>rL)rr rrrget_all_configsis rM)NT)N)r6typingrr functoolsr dataclassesrrstrrr>rLrMrrrrs<   0 $